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| Product Specification PE4268 Product Description The PE4268 SP6T RF UltraCMOSTM Switch addresses the specific design needs of the Quad-Band GSM Handset Antenna Switch Module Market. Broadband performance also makes it a versatile solution in other IF and RF applications. The switch includes two high power paths with low insertion loss and four low power paths with high isolation. On-chip CMOS decode logic facilitates three-pin low voltage CMOS control. High ESD tolerance of 1500 V at all ports and no blocking capacitor requirements make this the ultimate in integration and ruggedness. The PE4268 UltraCMOSTM RF Switch is manufactured in Peregrine's patented Ultra Thin Silicon (UTSi(R)) CMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. SP6T UltraCMOSTM 2.6 V Switch 100 - 3000 MHz Features * Three pin CMOS logic control with integral decoder/driver * Low TX insertion loss: 0.55 dB at 900 MHz, 0.7 dB at 1900 MHz * TX - RX Isolation of 48 dB at 900 MHz, 40 dB at 1900 MHz * Low harmonics: 2fo = -84 dBc and 3fo = -70 dBc at +35 dBm input power * 1500 V HBM ESD tolerance * RX SAW over voltage protection circuit * Harmonics immune to RX VSWR * No blocking capacitors required * 20-lead 4x4 mm QFN package Figure 1. Functional Diagram Figure 2. Package Type TX1 RX1 20-lead 4x4 mm QFN TX2 RX2 RX3 CMOS Control/Driver and ESD RX4 V1 V2 V3 Document No. 70-0165-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11 PE4268 Product Specification Table 1. Electrical Specifications @ +25 C, VDD = 2.6 V (ZS = ZL = 50 ) Parameter Operational Frequency ANT - TX - 850 / 900 MHz ANT - TX - 1800 / 1900 MHz ANT - RX - 850 / 900 MHz ANT - RX - 1800 / 1900 MHz TX - RX - 850 / 900 MHz TX - RX - 1800 / 1900 MHz TX1 - TX2 - 850 / 900 MHz TX1 - TX2 - 1800 / 1900 MHz 850 / 900 MHz 1800 / 1900 MHz 35 dBm TX Input - 850 / 900 MHz 33 dBm TX Input - 1800 / 1900 MHz 35 dBm TX Input - 850 / 900 MHz 33 dBm TX Input - 1800 / 1900 MHz RX Input RX Input (10-90%) (90-10%) RF 20 2 3 46 38 28 22 17 15 Condition Min 100 Typ Max 3000 Unit MHz dB dB dB dB dB dB dB dB dB dB Insertion Loss 0.6 0.8 0.9 1.1 50 42 30 24 20 18 -84 -80 -70 -66 40 0.75 0.95 1.15 1.35 Isolation Return Loss 2nd Harmonic1 -78 -77 -68 -63 dBc dBc dBc dBc dBm dBm s 3rd Harmonic1 IP3 1dB Compression Switching time Note : 1. Harmonics are characterized with a source that is 50 at the fundamental and reflective at the harmonics. Contact Applications Support at help@psemi.com for more information. (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 11 Document No. 70-0165-03 UltraCMOSTM RFIC Solutions PE4268 Product Specification Figure 3. Pin Configuration (Top View) GND GND GND GND ANT Table 4. Absolute Maximum Ratings Symbol VDD VI Parameter/Conditions Power supply voltage Voltage on any input Storage temperature range Operating temperature range TX input power (50 ) PIN RX input power (50 ) ESD Voltage (HBM, MIL_STD 883 Method 3015.7) VESD1 ESD Voltage (MM, JEDEC, JESD22-A114-B) ESD Voltage (CDM, JEDEC, JESD22-C101-A) +23 Min -0.3 -0.3 -65 -40 Max 4.0 VDD+ 0.3 +150 +85 +38 dBm Units V V C C 20 19 18 17 TX1 GND TX2 GND GND 16 1 2 3 4 5 10 15 RX1 RX2 GND RX3 RX4 TST TOP 20-lead QFN 4x4mm Exposed Solder Pad 14 13 12 11 6 7 8 9 GND VDD V3 V2 V1 1500 100 2000 V V V Table 2. Pin Descriptions Pin No. 11 2 31 4 5 6 7 8 9 10 11 1 Pin Name TX1 GND TX2 GND GND VDD V3 V2 V1 GND RX4 RX3 GND RX2 RX1 GND GND GND ANT GND RF I/O - TX1 Ground RF I/O - TX2 Ground Ground Supply Description Note 1: ANT port rated higher per applications section, see page 4. Switch control input, CMOS logic level Switch control input, CMOS logic level Switch control input, CMOS logic level Ground RF I/O - RX4 RF I/O - RX3 Ground RF I/O - RX2 RF I/O - RX1 Ground Ground Ground RF Common - Antenna Input Ground Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 4. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Table 5. Truth Table Path ANT - RX1 121 13 14 1 151 16 17 18 191 20 Note 1: Blocking capacitors needed only when connected to an external non-zero DC voltage. Table 3. DC Electrical Specifications Parameter VDD Supply Voltage IDD Power Supply Current (VDD = 2.6V) Control Voltage High Control Voltage Low 0.7 x VDD 0.3 x VDD Min 2.4 Typ 2.6 13 Max 2.8 20 Units V A V V V3 0 0 0 0 1 1 V2 0 0 1 1 0 1 V1 0 1 0 1 x x ANT - RX2 ANT - RX3 ANT - RX4 ANT - TX1 ANT - TX2 Document No. 70-0165-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 11 PE4268 Product Specification Evaluation Kit The SP6T Evaluation Kit board was designed to ease customer evaluation of the PE4268 RF switch. The PE4268 has two high power TX ports and four high isolation RX ports. The TX ports are symmetric and are designed as paths for the 850, 900, 1800, or 1900 MHz bands. The RX ports are also symmetric and can be assigned to any of these frequency bands. The ANT port connects through a 50 transmission line to the top SMA connector, J1. The RX and TX ports connect through 50 transmission lines to SMA connectors J2 - J7. A through 50 transmission line between SMA connectors J9 and J10 allows estimation of the PCB losses over environmental conditions. An open transmission line connected to J11 is also provided. J8 supplies DC power to the pin marked VDD and the bottom row of pins, which is GND. 1 M pull-up resistors are connected from VDD to each of the three control logic inputs: V1, V2, and V3. These pull-up resistors are provided for ease of evaluation on this board and are not required for the PE4268 to operate. Adding a jumper between a control pin and the adjacent GND pin on the bottom row of J8 will set a logic-0 on that control pin. Removing the jumper will set a logic-1. To evaluate the PE4268, add or remove jumpers according to the truth table in Table 5. Figure 4. Evaluation Board Layout Peregrine Specification 101/0205 ANT RX1 TX1 TX2 RX2 RX3 RX4 Through-Line Open Line Figure 5. Evaluation Board Schematic Peregrine Specification 102/0267 (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 11 Document No. 70-0165-03 UltraCMOSTM RFIC Solutions PE4268 Product Specification Typical Performance Data @ VDD = 2.6 V, 25 C (Unless otherwise noted) Figure 6. Insertion Loss: All Ports RX1 RX2 RX3 RX4 TX1 TX2 Figure 7. Insertion Loss: TX Over VDD 2.4 V 2.6 V 0 2.8 V 0.0 -0.5 Insertion Loss (dB) -0.5 Insertion Loss (dB) 0 1000 2000 Frequency (MHz) 3000 4000 -1.0 -1 -1.5 -1.5 -2.0 -2.5 -2 -3.0 -2.5 0 1000 2000 Frequency (MHz) 3000 4000 Figure 8. Insertion Loss: TX Over Temp -40C +25C 0 +85C Figure 9. Isolation: Worst Case Paths TX1-TX2 TX1-RX4 TX2-RX4 -10 -0.5 -30 Insertion Loss (dB) -1 Insertion Loss (dB) 0 1000 2000 3000 4000 -50 -1.5 -70 -2 -2.5 -90 0 1000 2000 3000 4000 Frequency (MHz) Document No. 70-0165-03 www.psemi.com Frequency (MHz) (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 11 PE4268 Product Specification Typical Performance Data @ VDD = 2.6 V, 25 C (Unless otherwise noted) Figure 10. Return Loss: Worse Case Paths A N T , R X1 R X1 T X1 Figure 11. TX Harmonics 915MHz Over VDD 2 .4 V 2 fo 2 .6 V 2 fo 2 .8 V 2 fo 2 .4 V 3 fo 2 .6 V 3 fo 2 .8 V 3 f o 0 -25 Harmonic Output Power (dBm) 0 1000 2000 3000 4000 -10 -35 Return Loss (dB) -45 -20 -55 -30 -65 -40 -75 28 30 32 34 36 38 Frequency (MHz) Input Power (dBm) Figure 12. TX Harmonics 915MHz Over Temp -40C 2fo +25C 2fo +85C 2fo -40C 3fo +25C 3fo +85C 3fo Figure 13. TX Harmonics 1900MHz Over VDD 2 .4 V 2 f o 2 .6 V 2 f o 2 .8 V 2 f o 2 .4 V 3 f o 2 .6 V 3 f o 2 .8 V 3 f o -25 -25 Harmonic Output Power (dBm) Harmonic Output Power (dBm) 28 30 32 34 36 38 -35 -35 -45 -45 -55 -65 -55 -75 -65 28 30 32 34 36 38 Input Power (dBm) (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 11 Input Power (dBm) Document No. 70-0165-03 UltraCMOSTM RFIC Solutions PE4268 Product Specification Typical Performance Data @ VDD = 2.6 V, 25 C (Unless otherwise noted) Figure 14. TX Harmonics 1900MHz Over Temp -40 2fo C +25 2fo C +85 2fo C -40 3fo C +25 3fo C +85 3fo C -25 Harmonic Output Power (dBm) -35 -45 -55 -65 28 30 32 34 36 38 Input Power (dBm) Document No. 70-0165-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 11 PE4268 Product Specification Figure 15. Package Drawing (mm) 20-lead 4x4 mm QFN 4.00 INDEX AREA 2.00 X 2.00 -B2.00 2.00 0.25 C -A0.10 C 0.08 C 0.020 0.20 REF EXPOSED PAD & TERMINAL PADS 0.435 0.18 SEATING PLANE 0.80 4.00 -C2.00 TYP 0.50 TYP 0.55 2.00 1.00 5 11 0.435 0.18 4.00 1. DIMENSION APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 FROM TERMINAL TIP. 2. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. DETAIL A 1 20 16 15 EXPOSED PAD 0.23 2.00 DETAIL A 1.00 6 10 2 1 0.10 CAB (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 11 Document No. 70-0165-03 UltraCMOSTM RFIC Solutions PE4268 Product Specification Figure 16. Marking Specification 4268 YYWW ZZZZZ YYWW = Date Code (Year, Work Week) ZZZZZ = Last five digits of PSC Lot Number Figure 17. Tape and Reel Drawing Document No. 70-0165-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 11 PE4268 Product Specification ESD Protection Circuit Handset products must tolerate large ESD surges at the antenna interface without damage. The IEC 61000-4-2 standard specifies both 8 kV contact and 16 kV air discharges that typical handsets must survive. By itself, the PE4268 offers protection to 1.5 kV but with the addition of two inexpensive passive components, the switch can meet the levels as specified in the IEC spec. Figure 18 is the suggested solution for compliance with the IEC standards. Figure 18. ESD Protection Circuit PE4268 ESD Protection L = 27 nH (muRata: LQG1127NJ00), C = 33 pF (muRata: GRM33C0G330J50) Table 6. PE4268 Antenna Application Test Results (C=150 pF, R=330 , IEC 61000-4-2 Standard) Test Condition +8 kV contact discharge, 10 times with 1s intervals -8 kV contact discharge, 10 times with 1s intervals +16 kV air discharge, 10 times with 1s intervals -16 kV air discharge, 10 times with 1s intervals Results Pass Pass Pass Pass Table 7. Ordering Information Order Code 4268-01 4268-02 4268-00 4268-51 4268-52 Part Marking 4268 4268 PE4268-EK 4268 4268 Description PE4268-20QFN 4x4mm-75A PE4268-20QFN 4x4mm-3000C PE4268-20QFN 4x4mm-EK PE4268G-20QFN 4x4mm-75A PE4268G-20QFN 4x4mm-3000C Package 20-lead 4x4mm QFN 20-lead 4x4mm QFN Evaluation Kit Green 20-lead 4x4mm QFN Green 20-lead 4x4mm QFN Shipping Method 75 units / Tube 3000 units / T&R 1 / Box 75 units / Tube 3000 units / T&R (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 11 Document No. 70-0165-03 UltraCMOSTM RFIC Solutions PE4268 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Peregrine Semiconductor, Korea #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 South Asia Pacific Peregrine Semiconductor, China Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Space and Defense Products Americas: Tel: 505-881-0438 Fax: 505-881-0443 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0165-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 11 |
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